Articles from ASTERA LABS, INC.

SANTA CLARA, Calif., Jan. 09, 2025 (GLOBE NEWSWIRE) -- Astera Labs, Inc. (Nasdaq: ALAB), a global leader in semiconductor-based connectivity solutions for AI and cloud infrastructure, today announced that it will release its financial results for the fourth quarter 2024 after the close of market on Monday, Feb. 10, 2025. Astera Labs will host a corresponding conference call at 1:30 p.m. Pacific Time, 4:30 p.m. Eastern Time.

Astera Labs, Inc. (Nasdaq: ALAB), a global leader in semiconductor-based connectivity solutions for cloud and AI infrastructure, today announced preliminary financial results for the third quarter of fiscal year 2024, ended September 30, 2024.

Astera Labs, Inc. (Nasdaq: ALAB), a global leader in semiconductor-based connectivity solutions for AI and cloud infrastructure, today announced a new portfolio of fabric switches, including the industry’s first PCIe® 6 switch, built from the ground up for demanding AI workloads in accelerated computing platforms deployed at cloud-scale. The Scorpio Smart Fabric Switch portfolio is optimized for AI dataflows to deliver maximum predictable performance per watt, high reliability, easy cloud-scale deployment, reduced time-to-market, and lower total cost of ownership.

Astera Labs, Inc. (Nasdaq: ALAB), a global leader in semiconductor-based connectivity solutions for AI and cloud infrastructure, today announced that it will release its financial results for the third quarter 2024 after the close of market on Monday, Nov. 4, 2024. Astera Labs will host a corresponding conference call at 1:30 p.m. Pacific Time, 4:30 p.m. Eastern Time.

Astera Labs, Inc. (Nasdaq: ALAB), a global leader in semiconductor-based connectivity solutions for AI and cloud infrastructure, today announced the official opening of its R&D site in India to establish a world-class engineering team and scale product development operations. The new office located in Bengaluru expands the company’s global footprint and is a foundational piece of its accelerated growth strategy as a leading enabler for deploying AI at cloud-scale.

Astera Labs, Inc. (Nasdaq: ALAB), a global leader in semiconductor-based connectivity solutions for cloud and AI infrastructure, today announced preliminary financial results for the second quarter of fiscal 2024, ended June 30, 2024.

Astera Labs, Inc. (Nasdaq: ALAB), a global leader in semiconductor-based connectivity solutions for AI and cloud infrastructure, today announced that it will release its financial results for the second quarter 2024 after the close of market on Tuesday, Aug. 6, 2024. Astera Labs will host a corresponding conference call at 1:30 p.m. Pacific Time, 4:30 p.m. Eastern Time.

Astera Labs, Inc. (Nasdaq: ALAB), a global leader in semiconductor-based connectivity solutions for AI and cloud infrastructure, today announced its plan to expand operations to India. The new site to be opened in Bangalore later this year will tap into the region’s rich engineering talent and establish a robust pipeline of cutting-edge interconnect technologies that enable AI architectures throughout the data center.

Astera Labs, Inc. (Nasdaq: ALAB), a global leader in semiconductor-based connectivity solutions for AI and cloud infrastructure, today announced the appointment of Bethany Mayer to its Board of Directors. Mayer brings over 30 years of experience as a visionary leader and board member at networking, cybersecurity, and semiconductor companies.

Astera Labs (Nasdaq: ALAB), a global leader in semiconductor-based connectivity solutions for AI and cloud infrastructure, announced today that it will release its financial results for the first quarter 2024 after the close of market on Tuesday, May 7, 2024. The company will host a corresponding conference call at 1:30 p.m. Pacific Time, 4:30 p.m. Eastern Time.

Astera Labs, Inc. (“Astera Labs”) today announced the pricing of its initial public offering of 19,800,000 shares of its common stock at a price to the public of $36.00 per share. The offering consists of 16,788,903 shares of common stock offered by Astera Labs and 3,011,097 shares of common stock to be sold by certain of Astera Labs’ existing stockholders.

Astera Labs, a global leader in semiconductor-based connectivity solutions for AI and cloud infrastructure, today announced the expansion of its widely deployed, field-tested Aries PCIe/CXL Smart DSP Retimer portfolio, to include a solution that delivers robust, low-power PCIe® 6.x and CXL® 3.x connectivity between next generation GPUs, accelerators, CPUs, NICs, and CXL memory controllers in data-centric systems.

Astera Labs, Inc. (“Astera Labs”) today announced the launch of its initial public offering of 17,800,000 shares of its common stock. The offering consists of 14,788,903 shares of common stock offered by Astera Labs and 3,011,097 shares of common stock to be sold by certain of Astera Labs’ existing stockholders. Astera Labs will not receive any proceeds from the sale of shares by the selling stockholders.

Astera Labs, the global leader in semiconductor-based connectivity solutions for cloud and AI infrastructure, announced new leadership appointments to drive corporate growth, strategic development, and product innovation. New senior leaders include Elli Castro-Bordano as Vice President and Deputy General Counsel, Chris Petersen as Fellow, Technology and Ecosystems, and Kelvin Khoo as Senior Vice President, Corporate Development.

Astera Labs, the global leader in semiconductor-based connectivity solutions for AI infrastructure, today announced that its Leo Memory Connectivity Platform enables data center servers with unprecedented performance for memory intensive workloads. Leo is the industry’s first Compute Express Link™ (CXL™) memory controller that increases total server memory bandwidth by 50% while also decreasing latency by 25% when integrated with the forthcoming 5th Gen Intel® Xeon® Scalable Processor. Through new hardware-based interleaving of CXL-attached and CPU native memory, Astera Labs and Intel eliminate any application-level software changes to augment server memory resources via CXL. Existing applications can effortlessly “plug-and-play” to take advantage of the highest possible memory bandwidth and capacity in the system.